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Hafnium Oxide Based Ferroelectric Memory

FeFET
Fig. 1: Cumulative distribution of the measured FeFET drain current in the 64 kbit array based on 28 nm technology. The result shows successful implementation of the FeFET eNVM.

The work aims towards the development of a memory concept, the HfO2 based ferroelectric transistor (FeFET). The FeFET is a long-term contender for an ultra-fast, low-power and non-volatile memory technology. In these devices the information is stored as a polariza-tion state of the gate dielectric and can be read non-destructively as a shift of the threshold voltage. The advantage of a FeFET memory compared to the Flash memory is its faster access times and much lower power consumption at high data rates.
In the framework of a project together with GLOBALFOUNDRIES and Fraunhofer IPMS, which was funded by the Free State of Saxony, a one-transistor (1T) FeFET eNVM was successfully implemented in a 28 nm gate-first super low power (28SLP) CMOS technology platform using only two additional structural masks. The electrical baseline properties remain the same for the FeFET inte-gration, demonstrating the feasibility of FeFET as low-cost eNVM. The JTAG-controlled 64 kbit memory shows clearly separated memory states (Fig. 1).

Fig. 2
Fig. 2: Scheme of FeFET-based reconfigurable NAND/NOR logic gate. Logic functionality is achieved by using the internal polarization state of the FeFET as one input and the applied gate voltage as the second.

 

 

 

High temperature retention up to 250 °C is demonstrated and endurance up to 105 cycles was achieved. More-over, the first implementation of a ferroelectric field effect transistor (FeFET) based eNVM solution into a leading edge 22 nm FDSOI CMOS technology was demonstrated.
The adoption of the FeFET technology beyond pure memory appli-cation was investigated. Based on results of electrical characteriza-tion and circuit simulation we presented for the first time a novel, reconfigurable NAND/ NOR logic gate based on a single FeFET. Our concept demonstrates the direct conjunction of logic and memory functionality, thus offering a promising approach for the realization of future logic-in-memory hardware solutions (Fig. 2).

Fig. 3
Fig. 3: Synapse circuit based on a single FeFET with gradual VT tuning, and measured spike-time dependent plasticity (STDP) like curves of charge flux depending on the relative timing between pre- and post-synaptic spike.

 

 

 

Moreover, we presented for the first time the emulation of the func-tionality of biological synapses based on a single FeFET integrated in 28 nm HKMG technology. The gradual and non-volatile ferroelec-tric switching is exploited to mimic the synaptic weight. We demon-strated both the spike-timing dependent plasticity (STDP) and the signal transmission (Fig. 3). Such compact nanoscale device is an essential element for neuromorphic systems.
The future goal of commercialization of the FeFET technology, which was developed in Saxony during the recent years, was pushed further by the foundation of a start-up company FMC (Fer-roelectric Memory Company, www.ferroelectric-memory.com).  

 

Contact: Dr. Stefan Slesazeck

 

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